Beijing Realtime Technology Co., Ltd

ICETEK-EP2S60-S60(v6.2) FPGA Experiment System

点击:1157 时间:2016-11-17




Hardware features:

Processing Board: ICETEK-EP2S60-A

- Using ALTERA Stratix II device: 484PIN BGA package

- On-board memory: 64K*16bit SRAM

                                  64M*16bit SDRAM

                                  8Mbit FLASH

- D/A: 2 channels

- Video input: 1 channel, PAL/NTSC format

- Video output: 1 channel, VGA format, conversion rate: 240MSPS

- Use TLV320AIC23 audio codec chip, realization of stereo audio signal coding and decoding

- Audio input interface: 2 channels

- Audio output interface: 2 channels

- RS232 serial data interface

- User switch

- Reset button

- With power management module, internal multiple power conversions

- Extended FPGA pins

- Extended interface: 34PIN*4, enables the secondary development

- Board size: 160mm×100mm


ALTERA FPGA Download Cable:

- ALTERA FPGA/CPLD download cable

- Via USB interface, ALTERA FPGA/CPLD chip and configured for operations such as programming, debugging


Signal source ICETEK-SG-A:

- Can produce both waveforms, parameters can be adjusted

- Produce square wave, sine wave, triangle wave, white noise and mixing waves

- You can use headphones and microphones for recording, playback


Teaching experiment box of S60:

- Stepper motor and DC motor

- Has a buzzer, traffic lights, LCD display

- You can use the keyboard to enter

Beijing Realtime Technology Co., Ltd.京ICP备12036152号
Tel:010-62105690(8 lines)/91-97 Email:welcome@realtimedsp.com.cn
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