Beijing Realtime Technology Co., Ltd

ICETEK-EP2C35-S60(v6.2) FPGA Experiment System

点击:1194 时间:2016-11-17





Hardware features:

Processing Board: ICETEK-EP2C35-A

- Using ALTERA Cyclone II processor: EP2C35

      · 484PIN FBGA package

      · The equivalent gate count for 1.65 million doors

      · High-speed external memory interface

      · Smart core DSP (IP cores)

      · Biggest user I/O: 322

- On-board SRAM: 256K*16bit

- On-board SDRAM: 8M*16bit

- On-board FLASH: 32MB

- Video input: 1 channel, PAL/NTSC format

- Video output: 1 channel, VGA format, conversion rate: 240MSPS

- Serial data interface

- TLV320AIC23 speech codec devices, realization of stereo audio signal coding and decoding

- Audio input interface: 2 channels

- Audio output interface: 2 channels

- A/D: 2 channels

- D/A: 2 channels

- Power management module, internal multiple power conversions

- Reset button

- User switch

- User LEDs

- Extended the FPGA interface, enables the secondary development

- Extended interface: 34PIN*4

- Board size: 160mm×100mm


ALTERA FPGA Download Cable:

- ALTERA FPGA/CPLD download cable

- Via USB interface, ALTERA FPGA/CPLD chip and configured for operations such as programming, debugging


Signal source ICETEK-SG-A:

- Can produce both waveforms, parameters can be adjusted

- Produce square wave, sine wave, triangle wave, white noise and mixing waves

- You can use headphones and microphones for recording, playback


Teaching experiment box of S60:

- Stepper motor and DC motor

- Has a buzzer, traffic lights, LCD display

- You can use the keyboard to enter

Beijing Realtime Technology Co., Ltd.京ICP备12036152号
Tel:010-62105690(8 lines)/91-97 Email:welcome@realtimedsp.com.cn
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